Topic outline

  • General

    SEE3243
    Lecturer : Muhammad Mun'im Ahmad Zabidi
    Muhammad Nadzir Marsono
    Kamal Khalil

    Semester : Semester I 2011/2012

    Objective

    To introduce students to basic techniques in designing and implementing complex digital systems.

    Synopsis

    This course is a continuation from basic digital electronic course (SEE 1223). It emphasizes on techniques to design, analyze, plan, and implement complex digital systems using programmable logic, with specific focus on programmable logic devices. In order to facilitate learning process, a computer-aided design (CAD) software is used throughout the course. Some practical or almost actual environment problems and solutions are provided.

    Creative Commons License This work, SEE3243 System Digit by Kamal Khalil is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 3.0 Unported License

    • Topic 1

      Introduction
      Digital design consideration. Introduction to CAD software. Hierarchical design. Review on logic gates, Boolean algebra, sum-of-product (SOP) and product-of sum (POS) expressions.
    • Topic 2

      Logic Theory

      Minimization using implicant technique. Karnaugh Map and Entered-Variable K-Map. Logic transformation. Hazards in digital logic circuits.

    • Topic 3

      Logic Design Using MSI Components and Memory

      Digital system implementation using multiplexers, decoders, tri-state buffers. Memory – ROM and RAM. Implementation using ROM.

    • Topic 4

      Advanced System Implementations Using Programmable Logic Devices

      Implementation using programmable logic array (PLA), programmable array logic (PAL) and PROM. Introduction to generic array logic (GAL), complex programmable logic device (CPLD) and field-programmable gate array (FPGA).


    • Topic 5

      Arithmetic circuits I – Adder and Subtractor

      Representation of negative numbers. 2’s complement addition and subtraction. Adder circuits – full adder, ripple carry adder. Subtractor circuits – full subtractor, multistage subtractor. Subtraction using adders

    • Topic 6

      Arithmetic Circuits II

      Carry look ahead (CLA) adder, comparator, Arithmetic logic unit (ALU) and combinational multiplier.
    • Topic 7

      Flip-flops and Sequential Circuits

      Latches and flip-flops, timing and clock trigger
    • Topic 8

      Introduction to Finite State Machine

      Registers and Counters

    • Topic 9

      FSM Modelling and Systematic Realization I

      Finite state machine – concept and structure. Moore and Mealy machines – characteristics. Design procedure. Examples of Moore and Mealy model –JASM, bit sequence detector, odd parity checker and dual-mode counter.

    • Topic 10

      FSM Modelling and Systematic Realization II

      Vending machine, finite string pattern recognizer, traffic light controller and digital combination lock.